1-3 of 3 results
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Novel n x n Bit-Serial Multiplier Architecture Optimized for Field Programmable Gate Arrays (FPGA)
PI Akhan Almagambetov
CO-I David Feinauer
CO-I Holly Ross
Bit-serial multipliers have a variety of applications, from the implementation of neural networks to cryptography. The advantage of a bit-serial multiplier is its relatively small footprint, when implemented on a Field Programmable Gate Array (FPGA) device. Despite their apparent advantages, however, traditional bit-serial multipliers typically require a substantial overhead, in terms of component usage, which directly translates to a large area of the chip being reserved while many of those resources are unused.
This research addresses the possibility of an efficient two's complement bit-serial multiplier (serial-serial multiplier) implementation that would minimize flip-flop and control set usage on an FPGA device, thereby potentially reducing the overall area of the circuit. Since the proposed architecture is modular, it functions as a "generic" definition that can be effortlessly implemented on an FPGA device for any number of bits.
Read moreCategories: Faculty-Staff
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Integrated Structural Health Sensors for Inflatable Space Habitats
PI Dae Won Kim
PI Sirish Namilae
Under this research project we will develop an innovative structural health monitoring system for inflatable space habitat structures by integrating nanocomposite piezoresistive sensors
Read moreCategories: Faculty-Staff
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Platform for Investigating Concept Networks on the Instrumentality of Knowledge (PICNIK)
PI Matthew Verleger
This engineering education research project seeks to develop a concept network for engineering and a platform for helping students identify how concepts are connected across a curriculum. The goal is to better understand and improve how students value the concepts being taught throughout their education.
Read moreCategories: Faculty-Staff
1-3 of 3 results